![]() ![]() There is no way to take more samples than that on an event. It also generates the phase shifted sampling clocks from the 50MHz oscillator and increments the SRAM address to take 10240 samples when it detects the correct edge on its trigger input. Samples from SRAM or the ADCs are passed on to the PC by the FPGA without the microcontroller being involved. The FPGA handles the low level parallel port protocol so that the microcontroller can interact with the PC using a single byte mailbox in its address space. There are a lot of design flaws making accurate measurements with this device nearly impossible. The hardware does not allow to sample both channels at the same time as the ADCs are always connected to the same signal. Analog Devices ADSP-2105 microcontroller at 12.5MHz.QuickLogic QL2003 pASIC 2 non-volatile FPGA. ![]()
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